An integrated circuit (IC or chip) generally comprises a plurality of circuit paths. A “circuit path” may be interpreted to mean arrangements of electronic circuitry components through which electrical current may flow when biased. Each path generally comprises a plurality of transistors and other elements such as resistors and capacitors, along with parasitics. In some cases, each path may be designed to perform a specific function. One of these paths may be the most poorly-performing (i.e., slowest) path, due to any of a variety of reasons, such as circuit complexity. The circuit path that limits the overall performance frequency of other circuit paths and/or the load itself may be termed herein the “critical path.”
Any of a variety of factors, such as temperature, voltage, manufacturing variation and other factors not specifically disclosed herein may affect the speed of the critical path, as well as that of any of the other circuit paths. For example, because the voltage supplied to a circuit path is applied to some or all of the transistors in the circuit path, the voltage dictates, at least in part, the performance of the transistors in the path. In turn, the performance of the transistors dictates, at least in part, the speed of the circuit path itself. Thus, if a voltage that is delivered to a circuit path is undesirably high or low (i.e., the voltage has been substantially altered by various circuit components and phenomena between a voltage source and the circuit path), the performance speed of the circuit path may likewise be undesirably high or low.
In some cases, such factors may impact the speed of the critical path and/or another path such that the speed of the path may become excessively low or excessively high. If the speed becomes excessively low, the path and/or the load may cease to function. Conversely, if the speed becomes excessively high, the chip and/or the load may waste power or even become damaged.
A system on a chip or system on chip (SoC or SOC, hereafter SOC) is an IC which integrates all components of a computer or other electronic system into a single chip/die. The SOC generally includes digital, analog, mixed-signal, and often radio-frequency circuitry and functions, all on a single chip.
On-chip sensors (OCS) are known to implement techniques such as adaptive voltage scaling (AVS) and dynamic voltage/frequency scaling (DVFS) to dynamically optimize the power and performance of a SOC by monitoring the OCS output under the process variation(s). On the other hand, the SOC also relies on the OCS to create an aging (over time) guardband for reliability purposes. To ensure a safe guardband, the OCS is designed to perform as a bounding device as it ages. To perform properly, the OCS should drift more than the most sensitive logic structure on the chip, and thus require more compensation (typically more VDD) than other circuits to resume its time zero performance.
Conventional OCSs can be based on ring oscillators (ROs). The RO frequency is measured as an indicator of the circuit's performance. Due to the close-loop nature of a RO, the RO's sensitivity to aging is limited due to the averaging effect of its delay drift. Although the sensitivity of the RO can be improved through transistor upsizing and increased transistor gate stacking, this improvement results in the loss of otherwise usable die size.
One example RO-based OCS is the NOR3 and/or NAND3 version of the SMARTREFLEX™ sensor from Texas Instruments Incorporated. As known in the art, an odd number of logic stages with feedback from the output to the input enables oscillation. Load capacitors (CL) to ground are generally added (typically 10 fF to 100 fF) to adjust the oscillation frequency. Such OCS are disclosed along with related circuitry and methods for utilizing in U.S. Pat. Nos. 7,307,471 and 7,793,119 both to Gammie et al. and assigned to Texas Instruments Incorporated (hereafter Gammie '471 and Gammie '119), the same assignee as the assignee of this patent application. The subject matter in Gammie '471 and Gammie '119 are both incorporated by reference into this patent application.